IC6.1.5 to ICADV12.1

Funniest quirk when I upgrade to ICADV12.1:

*WARNING* clsInit failed: Can't determine host name. Locking is not allowed with host name 'localhost'.

I had to change my hostname and things worked. vi /etc/hostname

cleaning up cdslck files in Cadence.

I created a script that finds all of the cdslck files and deletes them. Even if they are in SVN.
cleanlck.sh

#!/bin/bash
# This script files all cdslck files that Cadence creates and
# removes them.  This includes safe handling of cdslck files that
# have been committed to SVN.
FILES=$(find . -type f -name *cdslck*)
for f in $FILES
do
 #echo "Processing $f"
 svn info $f 1>/dev/null 2>&1
 if [ $? -eq 1 ];then
  rm -f $f
 else
  svn rm $f
 fi
done

creating a java jar file under Mac OS

In theory, this is easy. In practice, it is easy if you remember that you need a newline at the BOTTOM of the manifest file. The Manifest.txt just needs a new line, and it all works. It took me a few hours to figure this out. :/

Main-Class: testclass

And you just create the .jar file from your .class files:

jar cfm spicespi.jar Manifest.txt *.class

And then you can run it (or just click it in Mac OS.)

java -jar testclass.jar

cadence spectre error (VACOMP-1008)

Debian and Cadence, it never stops. This was another one of those "huh?" errors that showed up after I added a single model. The model has analog VHDL in it. As usual, spectre failures are just symptomatic of some other issue. The first issue was that mpstat was missing, which I fixed with the systat package:

apt-get install systat

The next issue was something different:

/bin/sh: Illegal option -h

The issue here was the /bin/sh is a link to /bin/dash in debian. I changed the link to /bin/bash. Once that was resolved, I then had the next issue related to features.h:

/usr/include/features.h:323:26: fatal error: bits/predefs.h: No such file or directory

I solved this by:

sudo apt-get install libc6-dev-i386

This was followed by the inability to find ctri.o, which is solved by linking:

sudo ln -s /usr/lib/x86_64-linux-gnu /usr/lib64

because LD_LIBRARY_PATH has /usr/lib64 in it.

And suddenly, 14nm is simulating!

Strange Assura error, was not an error at all.

I was having a strange assura error

localhost:~/ic/cadence/ibm7sf> avlck:   ERROR: The command /tools/cadence/assura615oa/share/oa/bin/sysname returned an error status:
                            unknown
avlck: INFO: Note that OpenAccess (OA) requires running the Configure phase.
avlck: See the "OpenAccess Installation and Configuration Guide" before
avlck: you complete the configuration step. This manual is included with
avlck: the Cadence product documentation.

localhost:~/ic/cadence/ibm7sf>  /tools/cadence/assura615oa/share/oa/bin/sysname
linux_rhel40_gcc44x

This doesn't make much sense, and because of how huge Cadence is as a piece of software, it was probably something else. Assura actually runs a file called assura_LVS.run, so I did a chmod +x on it.

localhost:~/ic/cadence/ibm7sf> ./.assura_LVS.run 
/tools/cadence/assura615oa/tools/assura/bin/32bit/assura: error while loading shared libraries: libelf.so.1: wrong ELF class: ELFCLASS64

Ah, it's shared library errors! "ldd /tools/cadence/assura615oa/tools/assura/bin/32bit/assura" will reveal the problems.

lmstat file not found.

I was getting a file not found error from lmstat after a system upgrade. lmstat depends on ld-lsb.so.3, which doesn't exist on my system anymore. I fixed it with a link:

ln -s ld-linux.so.2 ld-lsb.so.3

spectre ERROR (SFE-675)

I had some issues with Spectre after an update. Firstly, I couldn't find libelf.so.1, so I copied it into the mmsim directory library tree. Use "ldd" to figure out what is missing for Spectre. The next issue was a new one for me:

spectre ERROR (SFE-675)

You need to specify the type for "allModels.scs" in the ADS model options. I selected "tt" from the dropdown and it magically started working as magically as it stopped working.

Looking in the allModels.scs, the definition for the modes are given:

***********************************************************************
* "TT" corner : Nominal (default) process and Monte Carlo analyses
* "FFF" functional corner : "Fast" NMOS, "Fast" PMOS
* "SSF" functional corner : "Slow" NMOS, "Slow" PMOS
* "FS" corner : "Fast" NMOS, "Slow" PMOS
* "SF" corner : "Slow" NMOS, "Fast" PMOS
* "FF" corner : "Fast" NMOS, "Fast" PMOS
* "SS" corner : "Slow" NMOS, "Slow" PMOS
***********************************************************************

I was simulating subthreshold, so I've found that TT worked just as well as anything else because the BSIM models this was attached to don't do a good job at surface potential modeling.